The present invention relates to electronic signal processing and, in particular, to a digital quadrature vector modulator using a single bit delta-sigma modulation and a method for generating signals using the same.
The invention applies to the fields of electrical engineering, electronics, communications engineering and signal processing. The quadrature modulation technique is applicable to virtually all quadrature modulation schemes, which include for example, Quadrature Amplitude Modulation (QAM), Quadrature Phase Shift Keying (QPSK), Quadrature Quadrature Amplitude Modulation (Q3AM), Orthogonal Frequency Division Modulation (OFDM) and many others schemes.
Analog Quadrature Vector Modulation (AQVM)
Quadrature Vector Modulation using analog techniques is currently in wide use in communications and in many other fields which require signal processing. Commercial AQVMs, such as that illustrated in FIG. 1, are available from suppliers such as Mini-Circuits Division of Scientific Components, Hewlett-Packard Co., Watkins Johnson Co., Analog Devices, Inc. and many others. These devices are useful for general signal processing applications and are often used to implement single side-band (SSB) radio frequency signal modulation. Typical input spectrum 20 and output spectrum 22 for SSB AQVMs are shown in FIG. 2. The multiplier functions in AQVMs are often realized using diode mixers, field effect transistor (FET) based mixers, four quadrant multipliers such as Gilbert cells, or other analog multiplication techniques. The quadrature components for the input signal may be created using hybrid baluns if the bandwidth of the input signal is limited. In communications systems the input signals are often digital baseband signals, the quadrature components being generated digitally and subsequently converted to baseband analog signals before they are input to the AQVM.
In general a signal 24, fB, to be input to an AVQM is split (by e.g. a splitter 2 shown in FIG. 1) into in-phase and quadrature components, IB and QB respectively. The quadrature input signals may be generated using analog techniques, but, as noted above, are usually generated digitally and converted into analog prior to input to the vector modulator. As shown in FIG. 1, an analog modulating signal, often generated by a local oscillator (LO) 4 is also split by a splitter 6 into quadrature components, ILO and QLO. The quadrature components and the in-phase components are multiplied by multipliers 8 and summed by a summer 10 to produce IB*ILO+QB*QLO. The resulting output creates upper and lower sideband products 28 and 30 centred about the local oscillator frequency 26 as shown in FIG. 2. The lower sideband 28 is composed of in-phase I and Q products while the upper sideband 30 is composed of products of opposite phase. If the amplitude and phase matching of the analog modulators is very good, the upper sideband (USB) signal amplitude will be very small compared to the in-phase lower sideband (LSB) signal amplitude. The ratio 32 of the amplitude of the in-phase sideband to the out-of-phase sideband products is often referred to as the image rejection, image suppression or sideband suppression. The cancelled sideband is often referred to as the image.
In a similar fashion an upper sideband may be obtained by interchanging the ILO and QLO products to obtain IB*QLO+QB*ILO.
It is desirable in many communications applications to conserve bandwidth by using only a single sideband of the modulation products. However, because the frequency offset of the image (i.e. the unwanted sideband) from the desired sideband signal, fLOxe2x88x92(fLOxe2x88x92fB), is often very small compared to the local oscillator frequency, fLO, it may be very difficult or impossible to remove the image frequency by means of a filter. For this reason the image rejection performance (i.e. the unwanted sideband suppression) of the AQVM is of critical importance to the overall performance of the modulation technique and can be a fundamental limiting factor in the use of the technique. The image rejection of AQVMs varies depending upon the application, but is typically between 15 and 45 dB. Rejection above 30 dB often requires special manual tuning and often varies with temperature and frequency. For these reasons AQVMs can be costly to implement in large volume applications.
The Shannon-Hartley theorem (Modern Quadrature Amplitude Modulation, Webb and Hanzo, IEEE Press 1995, p. 39) states that the capacity and maximum transmission rates of a communications channel are limited by the available carrier to noise ratio. The image level from digital quadrature modulators presents noise like interference to the modulation scheme and hence poses a fundamental limit to the level of modulation and transmission rates which can be achieved using these analog modulators.
Digital Quadrature Vector Modulation (DQVM)
As taught by the Nyquist Sampling Theorem, it has long been understood that communications signals may be fully represented by their digital equivalents (Certain Factors Affecting Telegraph Speed, H. Nyquist, Bell System Tech Journal, April 1928, pp. 617). It is also widely known that quadrature vector modulation can be accomplished using digital techniques. Digital signals, however suffer from noise caused by the quantization process. The signal-to-noise ratio (S/N) of a signal quantized to n bits and having an equal probability of existing at each of the 2n levels, is given by the relationship 20 log(n2xe2x88x921) dB and increases by 6 dB per bit (Introduction to Communication Systems, F. G. Stremmler, Addison Wesley 1977 pp. 455).
Conventional digital modulators can be implemented in many forms. For example commercially available dedicated hardware multipliers, for instance, from Analog Devices Inc., can be used. Dedicated signal processing components such as the Texas Instruments TMS320 family of digital signal processor integrated circuits may also be used. It is also possible to implement a digital modulator in software using general purpose computers such as the Intel x86 family of processors. Conventional Digital Signal Processors (DSP) can achieve excellent image rejection due to the level of phase and amplitude matching which can be maintained in the digital process.
Conventional DSP techniques quantize both the baseband and the modulating signals to a sufficient number of bits to keep the noise to acceptable levels for the system application. Modern communications systems often require 10 bit quantization or higher.
Conventional DSP requires a number of multi-bit digital multiplications to be executed to complete the modulation function. These multiplications must be executed in real time. The circuits required to execute such multiplications utilize a large number of digital gates that consume a relatively large amount of power, and are limited in their maximum clock rates due to the size and complexity of the digital computations required. Because of the size of the integrated circuits involved, multi-bit multiplication circuits are relatively expensive and operate at slower clock speed than single bit digital circuits using the same technology. The use of multi-bit digital quadrature vector modulation is therefore often limited in its applicability to high speed communications systems because of cost, complexity, size, power requirements, and performance limitations of the circuits required by conventional techniques.
Delta Sigma (xcex94xcexa3) Modulation
Over the past twenty years a number of authors have described xcex94xcexa3 modulators for use as Digital-to-Analog Converters (DACs) . See for example Oversampling Delta-Sigma Data Converters, Candy and Temes, IEEE Press (1992). Delta Sigma modulation is a method of achieving high signal-to-noise ratios over limited bandwidths using single bit signals modified by feedback. xcex94xcexa3 modulators require high sampling rates relative to the applied signal. To date xcex94xcexa3 modulators have not been widely used in communications applications because of the need for very high clock rates to support the required sampling rates. This is changing, however, as semiconductor feature sizes allow faster and faster clock rates. It is therefore now possible to use xcex94xcexa3 modulators in communications applications, and these are now commercially available as, for example the National Semiconductor ADC16701.
It is an object of the present invention to provide a means for performing quadrature vector modulation digitally using circuits which are more readily adaptable to high volume manufacturing than conventional multi-bit digital modulation, and for achieving high suppression of the unwanted sideband in the single sideband upconversion of the DQVM.
The One Bit Digital Quadrature Vector Modulator (DQVM) and a method of generating single sideband output signals of the present invention are useful for a wide range of radio frequency, signal processing and wireless applications. The DQVM simplifies the necessary digital multiplication by using noise shaped one bit versions of both the baseband IB and QB signals to be modulated and the ILO and QLO modulating signals. The one bit DQVM enables a much faster digital implementation of the digital quadrature vector modulation function than can be achieved with conventional multi-bit digital techniques. Digital vector modulators are an improvement over conventional analog vector modulators as they are not subject to the amplitude and phase matching problems inherent in analog vector modulators. Furthermore, the single sideband upconversion of the DQVM of the present invention achieves high suppression of the unwanted sideband by applying an offset to one of the input samples.
In accordance with one aspect of the present invention, there is provided a method for producing a single bit stream using digital quadrature vector modulation. The method starts by receiving multi-bit digital in-phase and quadrature input signals at a baseband sample rate. An offset is implemented on one of the input signals at the baseband sample rate. The offset input signal and the other one of the input signals are modulated into single bit delta-sigma (xcex94xcexa3) coded bitstreams at a modulator sampling rate which is faster than the baseband sample rate. Orthogonal clock signals are created at a sampling rate equal to the modulator sampling rate and an effective frequency equal to one half of the modulator sampling rate. Then, the xcex94xcexa3 coded bitstreams are multiplied with the orthogonal clock signals so as to create two product single bit streams at the modulator sampling rate. The two product single bit streams are alternately combined into a interleaved single bit stream so that the interleaved single bit stream is clocked at a rate twice the modulator sampling rate.
In accordance with another aspect of the present invention, there is provided a Digital Quadrature Vector Modulator (DQVM) system comprising an offset implementing unit for implementing an offset on one of multi-bit digital in-phase and quadrature input signals received at a baseband sample rate; a first one bit delta-sigma (xcex94xcexa3) modulator for receiving and modulating the offset input signal at a modulator sampling rate which is faster than the baseband sample rate, and outputting a single bit xcex94xcexa3 coded bitstream of the offset input signal; a second one bit xcex94xcexa3 modulator for receiving and modulating at the modulator sampling rate a non-offset input signal which is the other one of the input signals, and outputting a single bit xcex94xcexa3 coded bitstream of the non-offset input signal; means for creating orthogonal clock signals at a sampling rate equal to the modulator sampling rate and an effective frequency equal to one half of the modulator sampling rate; a first multiplier for multiplying the xcex94xcexa3 coded bitstream of the offset input signal with one of the orthogonal clock signals so as to create a first product single bit stream based on the offset input signal; a second multiplier for multiplying the xcex94xcexa3 coded bitstream of the non-offset input with the other one of the orthogonal clock signals so as to create a second product single bit stream based on the non-offset input signal; and a multiplexer for alternately combining the first and second product single bit streams into a interleaved single bit stream so that the interleaved single bit stream is clocked at a rate twice the modulator sampling rate.
Other advantages, objects and features of the present invention will be readily apparent to those skilled in the art from a review of the following detailed descriptions of the preferred embodiment in conjunction with the accompanying drawing and claims.